A 500kHz-10MHz multimode power-performance scalable 83-to-67dB DR CTΔΣ in 90 nm digital CMOS with flexible analog core circuitry

Abstract

A fully flexible continuous-time (CT) ΔΣ with programmable bandwidth, resolution and power consumption in 1.2V 90 nm CMOS is presented. By introducing flexibility into the core building blocks, a DR of 67/72/78/83dB is achieved in maximum performance mode for WLAN, DVB, UMTS and BT for a power consumption of 6.8/5.5/6.4/5.0mW respectively. GSM operation is also feasible with a DR of 87dB. For a given bandwidth, the flexibility allows to obtain the lowest power consumption for a desired performance.