Concepedia

Abstract

For chip-scale interconnection, 4 times 12 vertical-cavity surface-emitting laser (VCSEL) arrays have been optimized. Each flip-chip bondable bottom-emitting oxide-confined 985 nm VCSEL have integrated backside lenses, and is capable of modulation at >20 Gb/s with a low current density of only 9.9 kA/cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> . An aggregate data rate of 960 Gb/s was obtained from a chip area of only 1.4 mm times 3.75 mm, or 18.3 Tb/(sldrcm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> ).

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