2002 · 170 citations · 3 references
EngineeringComputer EngineeringElectrical EngineeringComputer ArchitectureEmbedded SystemsMicroelectronicsDesign For TestabilityEmbedded Memory BlocksError DetectionHardware Fault ToleranceMemory Subsystem DesignBuilt-in Self-repairHardware Fault DetectionHardware Reliability AnalysisHigh-speed OperationMemory Built-in Self-repairMemory RepairSelf-repairing HardwareSoft Error Detection
A new practical built-in self-repair analyzer algorithm for embedded DRAMs (e-DRAM) achieves 100% detection ability of the repairable chips with 1% area penalty of the target 32 Mb embedded DRAM by 4 parallel analyzers. It works at as fast as 500 MHz, well beyond targeted e-DRAMs' maximum operation speed around 200 MHz+.
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A Fault-Driven, Comprehensive Redundancy Algorithm
John Day · IEEE Design & Test of Computers · 1985 · 132 citations