Wormhole run-time reconfiguration

TLDR

Configurable Computing Machines (CCMs) combine ASIC‑level performance with the flexibility of general‑purpose processors, but efficient operation requires rapid swapping of computational hardware, a process currently bottlenecked by global control strategies. The authors propose Wormhole Run‑time Reconfiguration as a distributed control methodology to address both device‑level CCM reconfiguration and system‑wide concurrent computing. Wormhole RTR is implemented as a distributed control scheme and demonstrated on Virginia Tech Colt/Stallion computational FPGAs, which incorporate the concepts and serve as a case study. The case study confirms that the Colt/Stallion FPGAs successfully implement Wormhole RTR concepts, illustrating the feasibility of the approach.

Abstract

Configurable Computing Machines (CCMs) are an emerging class of computing platform which provide the computational performance benefits of ASICs, yet retain the flexibility and rapid reconfigurability of general purpose microprocessors. In these platforms, computational is essentially swapped in and out of the platform as needed, much like paging in virtual memory systems. For an efficient platform, the swapping of the computational hardware (referred to as Run-Time Reconfiguration, or RTR) must be rapid. Thus far, the means of altering the configuration of CCMs has relied on global control strategies that present a fundamental bottleneck to the potential bandwidth of configuration information flowing into the CCM. Wormhole Run-time Reconfiguration is presented as a distributed control methodology that is applicable not only to the problem of device-level CCM reconfiguration, but to system-wide concurrent computing as a whole. The Virginia Tech Colt/Stallion integrated circuits are computational FPGAs incorporating Wormhole RTR concepts, and are discussed as a case study.