A Low-Power DCVSL-Like GIDL-Free Voltage Driver for Low-Cost RFID Nonvolatile Memory

Abstract

<?Pub Dtl=""?> The realization of a low-cost passive radio frequency identification (RFID) tag requires the ability to fabricate the system in a bulk CMOS process without any additional process steps. A recently presented single-poly C-Flash memory bitcell provides an ultralow-power option for implementation of a nonvolatile memory array for use in an RFID system, using only core masks. This cell requires the application of a 10-V potential difference between the cell's control lines for program and erase operations. Providing the required voltages, while using only standard devices results in several design challenges for the voltage drivers, such as the elimination of gate-induced drain leakage (GIDL) currents. In this paper, we present a pair of voltage driver architectures that utilize novel techniques to overcome these challenges. In addition, for the first time, we present an in-depth analysis of the dynamic behavior of standard level shifters. This analysis is applied to our proposed GIDL-free level shifters to provide a sizing methodology for optimization of the area, energy-per-operation, and delay of these circuits. The drivers were designed and fabricated in a TowerJazz 0.18- <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex Notation="TeX">$\mu \hbox{m}$</tex></formula> bulk CMOS technology, providing the required functionality with a low static-power figure of 47–49 pW and 0.03–0.36 pJ energy-per-operation.