A 71–76 GHz chip set for wireless communication in 65-nm CMOS technology

Abstract

This paper presents a chip set of RF front-end circuits using 65-nm CMOS technology. The chip set includes a LNA, a down-conversion mixer, an up-conversion mixer and a medium power amplifier. The LNA has the 3-dB bandwidth from 68 to 75 GHz with a peak value of 17 dB. The down-conversion mixer has a conversion loss of better than −5 dB from 53 to 73 GHz at 4 dBm LO power. The up-conversion mixer has a conversion loss better than −5 dB from 53 to 75 GHz at 6 dBm LO power. The medium power amplifier delivers 5 dBm P <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">1dB</inf> and 6.7 dBm P <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">sat</inf> at 71 GHz. These results show the potential of the 65-nm CMOS technology in high frequency circuit design.