Differential synchronous demodulator for modulating sensors and impedance measurements

Abstract

This paper describes a novel differential synchronous demodulator intended for signal conditioning in modulating sensors and impedance measurements. The circuit proposed merges the demodulating and low-pass filtering stages in a single integrator stage and yields, for differential measurements, the performance quality inherent to coherent demodulation, with the added advantages of compactness and low cost. We analyse the theoretical limits of the relevant performance parameters, such as the common mode rejection ratio (CMRR), signal-to-noise ratio (SNR), linearity and quadrature rejection. Our experimental results validate the theoretical predictions. In the range from 1 kHz to 50 kHz, the CMRR, which does not depend on matching integrating capacitors, exceeds 65 dB for unity differential gain, and the SNR exceeds 90 dB.