High performance solution-processed amorphous zinc tin oxide thin film transistor

TLDR

The ZTO thin films are highly transparent (>90 % transmittance) in the visible region. The study investigates the gate bias stability of the ZTO TFT. The authors fabricated amorphous ZTO TFTs via a simple, low‑cost solution process and observed that positive gate bias shifts the threshold voltage upward due to charge trapping at the channel/dielectric interface. The ZTO TFTs annealed at 400–500 °C operate in enhancement mode, with the 500 °C device achieving a mobility of 14.11 cm² V⁻¹ s⁻¹, a threshold voltage of 1.71 V, a subthreshold slope of 0.4 V dec⁻¹, and an on‑off ratio exceeding 10⁸.

Abstract

Thin film transistors (TFTs) with amorphous zinc tin oxide (ZTO) channel layer were fabricated by a simple and low-cost solution process. The ZTO thin films are highly transparent (>90% transmittance) in the visible region. The ZTO TFTs fabricated at 400 and 500 °C are operated in enhancement mode. The TFT annealed at 500 °C shows a mobility of 14.11 cm2 V−1 s−1, a threshold voltage of 1.71 V, a subthreshold slope of 0.4 V dec−1 and an on–off current ratio greater than 108. In addition, we investigated the gate bias stability of the TFT. Positive gate bias results in a positive shift of the threshold voltage due to the charge trapping in the channel/dielectric interface.