A hierarchical computer architecture for distributed simulation

Abstract

A methodology is developed to map hierarchical, modular discrete-event models onto a distributed simulated architecture, the hierarchical multibus multiprocessor architecture (HM/sup 2/A). The proposed architecture contains features closely reflecting the structure, behaviour, and modular properties of the model being simulated. Hence, this approach improves on previous approaches, which impose the model on a predesigned architecture.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>