FPGA v/s DSP Performance Comparison for a VSC-Based STATCOM Control Application

TLDR

DSPs and FPGAs are the leading platforms for implementing digital controllers and modulators in power converter applications. This study systematically compares DSP and FPGA technologies, outlining their main advantages and drawbacks. Using a linear control strategy for a VSC‑based STATCOM, the authors implemented prototypes on a TMS320F2812 DSP (with a virtual floating‑point library) and a Spartan‑3 XCS1000 FPGA (with two design variants to reduce hardware usage or computation time). Both platforms successfully controlled the STATCOM, but the FPGA achieved superior computation time thanks to its parallelism.

Abstract

Digital signal processors (DSPs) and field-programmable gate arrays (FPGAs) are predominant in the implementation of digital controllers and/or modulators for power converter applications. This paper presents a systematic comparison between these two technologies, depicting the main advantages and drawbacks of each one. Key programming and implementation aspects are addressed in order to give an overall idea of their most important features and allow the comparison between DSP and FPGA devices. A classical linear control strategy for a well-known voltage-source-converter (VSC)-based topology used as Static Compensator (STATCOM) is considered as a driving example to evaluate the performance of both approaches. A proof-of-concept laboratory prototype is separately controlled with the TMS320F2812 DSP and the Spartan-3 XCS1000 FPGA to illustrate the characteristics of both technologies. In the case of the DSP, a virtual floating-point library is used to accelerate the control routines compared to double precision arithmetic. On the other hand, two approaches are developed for the FPGA implementation, the first one reduces the hardware utilization and the second one reduces the computation time. Even though both boards can successfully control the STATCOM, results show that the FPGA achieves the best computation time thanks to the high degree of parallelism available on the device.