Publication | Open Access
A methodology for programming a pipeline array processor
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1978
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Fps-ap120b Array ProcessorEngineeringArray ComputingProgram AnalysisComputer DesignHardware AlgorithmComputer ArchitectureComputer EngineeringRecursive Filter ImplementationParallel ProgrammingComputer ScienceReconfigurable ArchitectureNoble GoalParallel ComputingProcessor ArchitecturePipeline Array ProcessorFpga DesignFilter Design
In this note a recursive filter implementation is discussed, analyzed and programmed in the most efficient way for the FPS-AP120B array processor. The purpose of this note is not only to demonstrate a good technique for programming this filter (even though it is a noble goal by itself), but to demonstrate the methodology involved. The FPS-AP120B array processor was chosen because it has microprogrammed control parallel pipeline architecture, which is typical for a wide class of high performance array processors.