A low-power 256-Mb SDRAM with an on-chip thermometer and biased reference line sensing scheme

Abstract

In order to achieve small self-refresh current (ICC <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">6</sub> ), the first 256-Mb SDRAM with an on-chip thermometer in the DRAM industry is implemented with a new self-refresh scheme. In addition, the biased reference line (BRL) sensing scheme improving refresh characteristics is proposed to increase refresh period and reduce ICC <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">6</sub> . The on-chip thermometer is characterized by a small area of 0.43 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> , low power consumption with less than 1-μA average current, and good accuracy of 5.85°C in the worst case. Good accuracy is achieved by incorporating many generic design techniques, including offset-free operational amplifiers and the chopping method, and small area is achieved by applying DRAM cell technology to integrating analog-digital converter. A 75% reduction in ICC <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">6</sub> at 60°C is achieved with on-chip thermometer and BRL sensing scheme improving 30% of refresh characteristic.