Recent Progress of Pixel Detector R&D based on SOI Technology

TLDR

Developing truly monolithic pixel detectors with 0.2 µm SOI CMOS technology for use in high‑energy physics, X‑ray material analysis, astrophysics, and medical sciences. The project employs KEK’s Multi Project Wafer runs, incrementally improving the process, and uses Czochralski and Float‑Zone silicon as starting materials. Detectors fabricated on FZ‑SOI wafers operated at full depletion below breakdown voltage, and the 14 µm pixel integration‑type device achieved excellent spatial resolution.

Abstract

We are developing truly monolithic pixel detectors with a 0.2 μm silicon-on-insulator (SOI) CMOS technology, which is intended to be utilized in various research fields, such as high-energy physics, X-ray material analysis, astrophysics and medical sciences. In the development project, KEK has organized several Multi Project Wafer (MPW) runs and the process has been incrementally improved. Czochralski (CZ-) and Float-Zone (FZ-) silicon has been used as a starting material for the detector fabrication. Using FZ-SOI wafers, the detectors worked at full depletion below the breakdown voltage. The up-to-date integration-type pixel detector with 14 μm pixel size has excellent spatial resolution.