2015 · 26 citations · 9 references
EngineeringComputer EngineeringElectrical EngineeringDigital CommunicationLow-power DesignMicroelectronicsCmos Circuit DesignComplementary Metal-oxide-semiconductor TechnologyDigital Integrated CircuitsMillimeter-wave CommunicationsMixed-signal Integrated Circuit DesignRadio-frequency Integrated CircuitsAdaptive EqualizationAnalog-to-digital ConversionCmos Analog Circuit DesignCmos Analog Integrated CircuitsRf Cmos DesignRobust PerformanceTransceiver ArchitecturesTransceiver Design
Rapid internet traffic growth has fueled the demand for bandwidth in metro networks and data centers and pushed the serial link data rate into 25Gb/s territory, populated by such electrical interface as OIF CEI-25G, CEI-28G [1], IEEE 802.3bj 100G-KR4. To cope with severe channel impairments at 25Gb/s with up to 30dB loss at Nyquist, a feed-forward equalizer (FFE)/decision feedback equalizer (DFE) based transceiver without power-hungry analog-to-digital converter (ADC) provides robust performance. This work presents a low-power and area-efficient transceiver that employs a 14-tap adaptive DFE at the receiver (RX) and a 5-tap FFE at the transmitter (TX) for multi-standard applications up to 28Gb/s in 28nm CMOS.
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Hiroshi Kimura, Pervez Aziz, Tai Jing et al. · IEEE Journal of Solid-State Circuits · 2014 · 96 citations · Full text