<title>Design of a low-light-level image sensor with on-chip sigma-delta analog-to-digital conversion</title>

Abstract

The design and projected performance of a low-light-level active-pixel-sensor (APS) chip with semi-parallel analog-to-digital (A/D) conversion is presented. The individual elements have been fabricated and tested using MOSIS* 2 micrometers CMOS technology, although the integrated system has not yet been fabricated. The imager consists of a 128 X 128 array of active pixels at a 50 micrometers pitch. Each column of pixels shares a 10-bit A/D converter based on first-order oversampled sigma-delta ((Sigma) -(Delta) ) modulation. The 10-bit outputs of each converter are multiplexed and read out through a single set of outputs. A semi- parallel architecture is chosen to achieve 30 frames/second operation even at low light levels. The sensor is designed for less than 12 e<SUP>-</SUP> rms noise performance.