Publication | Closed Access
Efficient FPGAs using nanoelectromechanical relays
77
Citations
26
References
2010
Year
Unknown Venue
Nem RelaysElectrical EngineeringEngineeringVlsi DesignNanoelectronicsEfficient FpgasComputer EngineeringComputer ArchitectureHysteresis CharacteristicsNetwork On ChipFpga DesignReconfigurable ArchitectureNanocomputingMicroelectronicsBeyond CmosProgrammable Routing
Nanoelectromechanical (NEM) relays are promising candidates for programmable routing in Field-Programmable-Gate Arrays (FPGAs). This is due to their zero leakage and potentially low on-resistance. Moreover, NEM relays can be fabricated using a low-temperature process and, hence, may be monolithically integrated on top of CMOS circuits. Hysteresis characteristics of NEM relays can be utilized for designing programmable routing switches in FPGAs without requiring corresponding routing SRAM cells. Our simulation results demonstrate that the use of NEM relays for programmable routing in FPGAs can simultaneously provide 43.6% footprint area reduction, 37% leakage power reduction, and up to 28% critical path delay reduction compared to traditional SRAM-based CMOS FPGAs at the 22nm technology node.
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