Design optimisation of a 1 MHz half-bridge CLL resonant converter

Abstract

A detailed design optimisation for the CLL resonant converter is presented and zero-voltage switching (ZVS) of MOSFETs is guaranteed in overall operation ranges. A series of analysis and calculations are presented to choose an ideal value of the loaded quality factor meeting the requirement of ZVS behaviour (inductive load and full discharge of the output capacitance of a MOSFET), ensuring the desired maximum voltage gain and optimal design with high efficiency at normal operation point. Corresponding illustrations are provided to clearly show the analysis result. The developed design optimisation method has been implemented into a 1 MHz CLL resonant converter prototype. It is designed to operate with an output voltage of 24 V and full load output power of 250 W. The maximum efficiency reaches 93% and power density reaches 32 W/inch3. Therefore the proposed converter is suitable for high efficiency and high power density applications such as LCD and PDP TV power module.