PAAG: A Polymorphic Array Architecture for Graphics and Image Processing

Abstract

A novel, polymorphic array architecture is proposed in this paper. This architecture is capable of supporting a dynamic mixture of data parallel computation (DLP), thread level parallel computation (TLP), and operation level parallel computation (OLP). We aim at designing a programmable architecture that can approach ASIC performance. This is accomplished through new architectural features and implementation level innovations. The architecture and its implementation are presented in the paper to demonstrate its feasibility and capabilities.