Reference-Scheme Study and Novel Reference Scheme for Deep Submicrometer STT-RAM

Abstract

As technology scales down, the sensing margin of spin-transfer-torque random access memory is significantly degraded because of the increased process variation and decreased supply voltage. The sensing current, which is limited to prevent read disturbance, further degrades the sensing margin. To improve the sensing margin, various reference schemes have been proposed. However, it is essential to be selective because the read stability, write ability, and array efficiency are very different according to the reference schemes. This paper presents the study of a variety of reference schemes and outlines five requirements for an optimized reference scheme as follows: 1) no parasitic mismatch, 2) no regularity problem, 3) no read disturbance, 4) no write-current degradation, and 5) small area overhead. A novel reference scheme that satisfies all the requirements for the optimized reference scheme is proposed using four 1T1MTJ cells and a reference word line structure with the same parasitic scheme.