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A 65nm C64x+ Multi-Core DSP Platform for Communications Infrastructure
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2007
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System On ChipManycore ProcessorEngineeringVlsi DesignMixed-signal Integrated CircuitDsp CoresMany-core ArchitectureComputer EngineeringComputer ArchitectureElectronic CircuitCombined Processing PowerParallel ComputingMicroelectronicsSingle ChipCommunications Infrastructure
The combined processing power of three 1+GHz DSP cores and 65nm 7M CMOS integration delivers a WCDMA macro base-station on a single chip. The 300M transistor IC can perform up to 24000MIPS, 8000 16b MMACs per second, coupled with symbol-rate and chip-rate acceleration and dissipates less than 6W.