2006 · 12 citations · 8 references
EngineeringComputer EngineeringComputer ScienceComputer ArchitectureHardware-software Co-designParallel ComputingDataflow ModelingHardware Modeling For Digital SystemsInstruction Set ArchitectureMulticore Processor DesignProcessor Core DesignTiming ModelingConcurrent ComputationExecution Time AnalysisFunctional Modeling FormalismsMany-core ArchitectureTime-to-market Reduction
Architectures with multiple programmable cores are becoming more attractive for video codec applications because they can provide highly concurrent computation and support multiple video standards and a shorter time-to-market. To find an efficient SW code for the multiple core architecture for a video codec application, it is very important to easily explore the design space by generating a SW code automatically from its functional model.We introduce Abstract Clock Synchronous Model (ACSM) for functional modeling of video codec applications. The ACSM can easily represent both parallelism and conditionals, which are common in video codec applications. By applying ACSM to an H.264 baseline decoder on single core architecture, we reduced the execution time and the number of external memory accesses by 32% and 46% respectively compared to traditional dataflow model.
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