IEEE Journal of Selected Topics in Signal Processing · 2014 · 410 citations · 36 references
EngineeringComputer EngineeringElectrical EngineeringAntennasReconfigurable ComputingWireless CommunicationsDigital Signal ProcessingMassive Multiple-input Multiple-outputMatrix ComputationMimo AntennasNumerical Linear AlgebraSignal ProcessingFrequency Division Multiple AccessMassive Mimo DetectionMassive Multiple-input Multiple-output Multiple AccessMimo SystemsMultiple-input Multiple-output CommunicationPerformance Trade-off AnalysisSoft Error DetectionVery-large-scale Integration (Vlsi) Design
Large‑scale MIMO is a key technology for next‑generation multi‑user cellular systems, such as those defined in 3GPP LTE Release 12. This paper proposes the first VLSI design for high‑throughput data detection in SC‑FDMA‑based large‑scale MIMO systems. The authors develop a Neumann‑series‑based approximate matrix‑inversion algorithm that lowers detection complexity, analyze its error, compare it to exact linear detection, and implement both exact and approximate soft‑output detectors in VLSI architectures for various antenna/user configurations. FPGA implementations achieve over 600 Mb/s throughput for a 128‑antenna, 8‑user LTE large‑scale MIMO system, and the study shows that the optimal detector depends on the antenna‑to‑user ratio and target error‑rate.
Large-scale (or massive) multiple-input multiple-output (MIMO) is expected to be one of the key technologies in next-generation multi-user cellular systems, based on the upcoming 3GPP LTE Release 12 standard, for example. In this work, we propose - to the best of our knowledge - the first VLSI design enabling high-throughput data detection in single-carrier frequency-division multiple access (SC-FDMA)-based large-scale MIMO systems. We propose a new approximate matrix inversion algorithm relying on a Neumann series expansion, which substantially reduces the complexity of linear data detection. We analyze the associated error, and we compare its performance and complexity to those of an exact linear detector. We present corresponding VLSI architectures, which perform exact and approximate soft-output detection for large-scale MIMO systems with various antenna/user configurations. Reference implementation results for a Xilinx Virtex-7 XC7VX980T FPGA show that our designs are able to achieve more than 600 Mb/s for a 128 antenna, 8 user 3GPP LTE-based large-scale MIMO system. We finally provide a performance/complexity trade-off comparison using the presented FPGA designs, which reveals that the detector circuit of choice is determined by the ratio between BS antennas and users, as well as the desired error-rate performance.
36