A 2.45GHz ultra-low power quadrature front-end in 65nm CMOS

Abstract

This paper presents a 2.45 GHz ultra-low power direct conversion receiver front-end, intended for applications such as medical implants and body area networks. It consists of low noise amplifier, passive quadrature mixers, voltage controlled oscillator and frequency divider. Manufactured in 65 nm CMOS it achieves 27 dB gain, 9 dB noise figure and S11 better than -14 dB, while consuming below 400 μW from a 0.8V supply. It has an in band and out of channel IIP3 of -24.5 and -21 dBm, repectively. Requiring only two inductors it occupies an area of less than 0.1 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> excluding pads.