Differential-read 8T SRAM cell with tunable access and pull-down transistors

Abstract

A novel 8T SRAM cell with high stability and write speed is proposed. The tunable access transistors and pull-down transistors are used to favour the desired operations. During a write operation, the strength of access transistors is enhanced, resulting in improving noise-immunity and write speed. The strength of pull-down transistors is enhanced during the read operation, hence exhibiting a high noise tolerance. The experimental results show that the proposed 8T cell can provide approximately 1.28× improvement in read static noise margin (SNM) and 1.10× improvement in write SNM compared to the standard 6T cell at 0.9V in 65nm process. Moreover, it also achieves 1.52× faster write speed and higher process variation tolerance.