Design and implementation of IEEE 802.15.7 VLC PHY-I transceiver

Abstract

This paper presents the design and implementation of a VLC (visible light communication) transceiver complying with the Type-I physical layer (PHY-I) specified in IEEE 802.15.7 Standard. Both the system architectures and the building blocks are described in detail. The design is implemented by Verilog-HDL and verified on Xilinx Virtex-5 Field-Programmable Gate Arrays (FPGA). Layout implementation using ASIC development tools is also provided for the transmitter design. The system is targeted at information broadcasting with data rates from 11.67 kb/s to 266.6 kb/s. Measurement result proves that the system can achieve a bit error rate (BER) of 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-6</sup> when the received illuminance is 18 lx.