Publication | Closed Access
High performance 22/20nm FinFET CMOS devices with advanced high-K/metal gate scheme
105
Citations
1
References
2010
Year
Unknown Venue
Finfet Cmos DevicesElectrical EngineeringEngineeringVlsi DesignHigh Performance 22/20NmImmersion LithographyNanoelectronicsElectronic EngineeringBias Temperature InstabilityApplied PhysicsCmos Bulk FinfetIntegrated CircuitsMicroelectronicsBeyond CmosSemiconductor Device
A high performance 22/20nm CMOS bulk FinFET achieves the best in-class N/P I<inf>on</inf> values of 1200/1100 µA/µm for I<inf>off</inf>=100nA/µm at 1V. Excellent device electrostatic control is demonstrated for gate length (L<inf>gate</inf>) down to 20nm. Dual-Epitaxy and multiple stressors are essential to boost the device performance. Dual workfunction (WF) with an advanced High-K/Metal gate (HK/MG) stack is deployed in an integration-friendly CMOS process flow. This dual-WF approach provides excellent V<inf>th</inf> roll-off immunity in the short-channel regime that allows properly positioning the long-channel device V<inf>th</inf>. Enhanced 193nm immersion lithography has enabled the stringent requirements of the 22/20nm ground rules. Reliability of our advanced HK/MG stack is promising. Excellent SRAM static noise margin at 0.45V is reported.
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