Publication | Closed Access
Automating the Design of Processor/Accelerator Embedded Systems with LegUp High-Level Synthesis
30
Citations
11
References
2014
Year
Unknown Venue
Soc FpgaHardware ModelingEngineeringHardware Verification LanguageComputer ArchitectureSystem-level DesignSystem SynthesisEmbedded SystemsFormal VerificationLegup FrameworkHardware ArchitectureComputer DesignSystems EngineeringHardware Description LanguageParallel ComputingLegup High-level SynthesisHybrid SystemComputer EngineeringComputer ScienceFpga DesignSoftware DesignHardware EmulationHardware AccelerationProgram AnalysisFormal MethodsParallel Programming
LegUp [1] is an open-source high-level synthesis (HLS) tool that accepts a C program as input and automatically synthesizes it into a hybrid system. The hybrid system comprises an embedded processor and custom accelerators that realize user-designated compute-intensive parts of the program with improved throughput and energy efficiency. In this paper, we overview the LegUp framework and describe several recent developments: 1) support for an embedded ARM processor, as is available on Altera's recently released SoC FPGA, 2) HLS support for software parallelization schemes -- pthreads and OpenMP, 3) enhancements to LegUp's core HLS algorithms that raise the quality of the auto-generated hardware, and, 4) a preliminary debugging and verification framework providing C source-level debugging of HLS hardware. Since its first release in 2011, LegUp has been downloaded over 1000 times by groups around the world, providing a powerful platform for new research in high-level synthesis algorithms and embedded systems design.
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