A two-stage amplifier with active miller compensation

Abstract

A two-stage amplifier with active miller compensation is presented in this paper. Unlike the two-stage amplifier with conventional miller compensation, the proposed structure doesn't contain right half plane zero. What is more, a left half plane zero is created to cancel the first non-dominant pole. The proposed structure improves the bandwidth significantly and reduces the dimension of the compensation capacitor. The proposed two-stage amplifier is designed and simulated in standard 0.6 μm CMOS process. Simulation results show that the unit-gain frequency is increased by 9.4 times with only 38% increase in power consumption. The overall FoM is improved by 31.5 times.