Modeling of backgating effects on GaAs digital integrated circuits

Abstract

The characteristics of GaAs MESFETs are analyzed and modeled, and the results are used to simulate the performance of GaAs digital integrated circuits in the presence of backgating. The degradation of the output current of a MESFET in a circuit is theoretically calculated by treating the channel-substrate interface as a p-n junction, with the junction bias being linearly proportional to the voltage difference between the source voltage of the MESFET and the negative bias of the integrated circuit. Good agreement is obtained between theoretical calculation and the experimental results. This analysis shows that high-threshold-voltage MESFETs are less sensitive to backgating than low-threshold-voltage devices. The model developed for backgating was incorporated into a SPICE 2 program. SPICE was used to simulate the operation of several ring oscillators with different device characteristics. The computer simulation results agree well with the experimental results. Corrections in circuit design to compensate for the backgating effect have been successfully made, and improvements in the circuit performance have been observed.