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Highly linear inductively degenerated 0.13μm CMOS LNA using FDC technique
13
Citations
14
References
2014
Year
Unknown Venue
Cmos LnaElectrical EngineeringEngineeringCircuit SystemNonlinear CircuitDistortion ComponentsBias Temperature InstabilityAnalog DesignApplied PhysicsMixed-signal Integrated CircuitOverall LinearityMicroelectronicsCmos ProcessElectronic Circuit
In this paper, a highly linear, inductively degenerated, common source narrowband LNA is presented. An extremely simple feed-forward distortion circuit (FDC) which consists of an appropriately sized ac-coupled diode connected NMOS is proposed. This circuit generates distortion components at output, when added at the input node as a feed forward element (M <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">6</inf> ). These distortion components partially cancel the 3 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">rd</sup> order nonlinearity of the cascode pair (M <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf> & M <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</inf> ), thus improving the overall linearity of LNA. The prototype is manufactured in standard 0.13μm CMOS process from IBM. Simulation and partial measurement results show the S11 and S22 to be −19.27dB and −7.14dB respectively at 2.45GHz. The simulation results of the LNA demonstrate a power gain of 18.5dB, NF of 4.38dB, input referred 1dBCP of −11.76dBm and IIP3 of +0.7dBm consuming 27.7mA from 1.0V power supply. The proposed LNA achieves the best input referred IIP3 reported in recent literature using 0.13μm CMOS in 2.4GHz frequency band.
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