Digital implementation of cellular sensor‐computers

TLDR

The paper proposes a bit‑sliced digital implementation of a cellular sensor‑computer, analyzes its architecture, and presents an implementation example. The study compares analogue and bit‑sliced digital implementation methods for the cellular sensor‑computer. The digital implementation is shown to be a viable alternative to analogue versions on or below 0.18 µm technology for general‑purpose designs. © 2006 John Wiley & Sons, Ltd.

Abstract

Abstract A bit‐sliced digital implementation method of the cellular sensor‐computer is proposed. The proposed sensor‐computer architecture is analysed, and an implementation example is introduced. The analogue and the digital implementation methods are compared. It is found that on or below 0.18 µm technology the digital implementation of the cellular sensor‐computer is a viable alternative to the analogue versions in general‐purpose designs. Copyright © 2006 John Wiley & Sons, Ltd.