Design, Automation, and Test in Europe · 2015 · 14 citations · 17 references
EngineeringComputer EngineeringComputer ScienceHardware-software Co-designLow-power DesignSchedulingCpu SchedulingMulticore Processor DesignPower ManagementTask SchedulingThermal ManagementVoltage ScalingDynamic Voltage And Frequency ScalingHotspot ManagementHotspot MitigationMulti-core ComputingOperating VoltageSystem ReliabilityTemperature ProfilesThermal-aware Microarchitecture
Hotspots occur frequently in 3D multi-core processors (3D-MCPs) and they can adversely impact system reliability and lifetime. Moreover, frequent occurrences of hotspots lead to more dynamic voltage and frequency scaling (DVFS), resulting in degraded throughput. Therefore, a new thermal-constrained task scheduler based on thermal-pattern-aware voltage assignment (TPAVA) is proposed in this paper. By analyzing temperature profiles of different voltage assignments, TPAVA pre-emptively assigns different operating-voltage levels to cores for reducing temperature increase in 3D-MCPs. Moreover, the proposed task scheduler integrates a vertical-grouping voltage scaling (VGVS) strategy that considers thermal correlation in 3D-MCPs. Experimental results show that, compared with two previous methods, the proposed task scheduler can respectively lower hotspot occurrences by 47.13% and 53.91%, and improve throughput by 6.50% and 32.06%. As a result, TPAVA and VGVS are effectively for reducing occurrences of hotspots and optimizing throughput for 3D-MCPs under thermal constraints.
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A thermal-driven floorplanning algorithm for 3D ICs
Thermal Performance Challenges from Silicon to Systems
R. Viswanath · 2000 · 317 citations
Interconnect and thermal-aware floorplanning for 3D microprocessors