IEEE Journal of Solid-State Circuits · 1986 · 12 citations · 12 references
EngineeringComputer EngineeringElectrical EngineeringAnalog ElectronicsMicroelectronicsVlsi DesignCmos Circuit DesignDigital Integrated Circuit DesignDigital Signal ProcessingIntegrated Circuit DesignMixed-signal Integrated Circuit DesignMixed-signal IntegrationDigital Audio SystemsFilter SynthesisHigh-level Synthesis For Digital Signal ProcessingIntegrated FiltersSignal-to-noise RatioSwitched-capacitor Circuit DesignSwitched-capacitor CircuitsSwitched-capacitor Filters
The semi-automatic design and custom integration of a high-quality digital audio preamplifier filter set are described. The set consists of an offset filter, ten graphic equalizer sections, and a scratch filter with a worst-case overall signal-to-noise ratio of 10 dB. The silicon compiler CATHEDRAL-1 supports the design from specifications to layout. The combination of efficient synthesis tools with optimisation at all design levels leads to a very compact silicon integration, compared with a general-purpose signal processor approach. An experimental chip is described on which the offset filter, three equalizer sections, and the scratch filter are integrated. The silicon area is 243 mm/SUP 2/ in a conservative 6-/spl mu/m NMOS technology or 8 mm/SUP 2/ when scaling down to 3-/spl mu/m technology, allowing for functional densities up to 0.2 mm/SUP 2/ pole zero, comparable with area requirements for typical switched-capacitor filters. The total filter set requires only 20 mm/SUP 2/ in a 3-/spl mu/m NMOS technology, which demonstrates the potential for low-cost digital high-fidelity signal processing.
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