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Annealing behavior of low-energy ion-implanted phosphorus in silicon
37
Citations
21
References
2005
Year
SemiconductorsMaterials ScienceElectrical EngineeringPhosphorous DiffusionEngineeringElectronic MaterialsCrystalline DefectsIon ImplantationOxide ElectronicsSurface ScienceApplied PhysicsLow-energy Ion-implanted PhosphorusRoom-temperature ImplantsOptoelectronic DevicesSurface OxidePhosphoreneSilicon On Insulator
Phosphorous diffusion in silicon has been investigated for room-temperature implants of low energy (5, 10, and 30 keV) and fluence between 1×1014 and 5×1015cm−2, followed by rapid thermal annealing in the temperature range of 600–1000 °C. Depth profiles were extracted by time-of-flight secondary-ion-mass spectroscopy. For 5-keV energy implants below 1×1015cm−2 fluence, phosphorus preferentially diffused outwards, i.e., toward the sample surface. Nuclear reaction analysis in combination with chemical stripping of the oxide shows that as much as 50% of the P in annealed samples can accumulate at the surface oxide during a 30-s anneal. At all implant energies, indiffusion of P dominates in the regimes of higher fluence, higher anneal temperature, and longer anneal times.
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