Publication | Closed Access
Parallel probing: dynamic and constant time setup procedure in circuit switching NoC
23
Citations
8
References
2012
Year
Parallel ProbeEngineeringVlsi DesignComputer ArchitectureInterconnection Network ArchitectureSystems EngineeringCircuit Switching NocParallel ComputingNetwork OptimizationCircuit AnalysisAsynchronous CircuitsComputer EngineeringInterconnection NetworkNetwork On ChipSequential ProbeComputer ScienceCircuit DesignSetup MethodParallel ProbingCircuit Simulation
We propose a circuit switching Network-on-chip with a parallel probe searching setup method, which can search the entire network in constant time, only dependent on the network size but independent of the network load. Under a specific search policy, the setup procedure is guaranteed to terminate in time 3D+6 cycles, where D is the geometric distance between source and destination. If a path can be found, the method succeeds in 3D+6 cycles; if a path cannot be found, it fails in maximum 3D+6 cycles. Compared to previous work, our method can reduce the setup time and enhance the success rate of setups. Our experiments show that compared with a sequential probe searching method, this method can reduce the search time by up to 20%. Compared with a centralized channel allocator method, this method can enhance the success rate by up to 20%.
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