A process-insensitive high-performance NMOS operational amplifier

Abstract

A new high-performance NMOS operational amplifier is described which has been fabricated using a standard n-channel enhancement-depletion MOS process. A new input stage, employing common-mode feedback, is presented that reduces the circuit's sensitivity to process variations. The compensation of MOS cascade stages is examined and a simple improvement is shown to dramatically reduce the total compensation capacitance. It is shown that the high-performance of this design is maintained for a large variation in depletion device thresholds. Finally, an output stage is described with low quiescent power dissipation and improved driving capabilities.