Capacitive-data links, energy-efficient and high-voltage compliant visual intracortical microstimulation system

Abstract

We present in this paper a new architecture of a visual intracortical microstimulator, which is composed of an external controller providing electromagnetic energy and capacitive-link based high data rate link, and a multi-unit energy-efficient implant. The latter is composed of 2 full custom chips. The first one is a multiwaveform stimuli generator dedicated to supply microstimulation-based constant current to the second chip grouping a multichannel high-impedance microelectrode driver (MED). The stimuli generator is featured with several new power-efficient building blocks such as high-performance current mirrors, low-area source/sink current-mode digital-to-analog converters (DACs), and low-power dedicated controller. The highly-configurable MED, which provides the multi-level current (2 to 196 μA), drives an array of microelectrodes through high-voltage switches. The stimuli generator is implemented in 1.2/3.3 V IBM CMOS 0.13 μm technology. However the output MED is fabricated in DALSA 0.8 μm 5V/20V CMOS/DMOS technology. The latter supplies needed compliance voltage of 10V across high impedance (average value of 100kΩ) microelectrode-tissue interface. The silicon areas of the low-voltage and highvoltage chips are 1.75×1.75 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> and 4.0×4.0 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> respectively. Post-layout simulation results are provided to show the expected operation of the device.