Concepedia

Publication | Open Access

STDP and STDP variations with memristors for spiking neuromorphic learning systems

512

Citations

98

References

2013

Year

TLDR

Neurons fire spikes asynchronously and memristive synapses compute and learn at their own pace, mirroring biological neural systems. The paper reviews asynchronous STDP implementations with memristors and focuses on using individual memristors for synaptic weight multiplication without requiring global synchronization or separate learning and performing phases. The authors distinguish between moving‑wall and filament‑based memristor physics and describe two STDP rule types—pure timing‑based and hybrid timing‑plus‑post‑synaptic state—implementable with memristors. The study demonstrates implementation of these STDP rules in cross‑bar memristor arrays and discusses applications to artificial vision.

Abstract

In this paper we review several ways of realizing asynchronous Spike-Timing Dependent Plasticity (STDP) using memristors as synapses. Our focus is on how to use individual memristors to implement synaptic weight multiplications, in a way such that it is not necessary to (a) introduce global synchronization and (b) to separate memristor learning phases from memristor performing phases. In the approaches described, neurons fire spikes asynchronously when they wish and memristive synapses perform computation and learn at their own pace, as it happens in biological neural systems. We distinguish between two different memristor physics, depending on whether they respond to the original ``moving wall'' or to the ``filament creation and annihilation'' models. Independent of the memristor physics, we discuss two different types of STDP rules that can be implemented with memristors: either the pure timing-based rule that takes into account the arrival time of the spikes from the pre- and the post-synaptic neurons, or a hybrid rule that takes into account only the timing of pre-synaptic spikes and the membrane potential and other state variables of the post-synaptic neuron. We show how to implement these rules in cross-bar architectures that comprise massive arrays of memristors, and we discuss applications for artificial vision.

References

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