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A 2.45GHz, 50uW wake-up receiver front-end with −88dBm sensitivity and 250kbps data rate
20
Citations
8
References
2014
Year
Unknown Venue
Low-power ElectronicsSensor NetworksElectrical EngineeringEngineeringRadio EngineeringRadio FrequencyHigh-frequency DeviceMixed-signal Integrated CircuitWake-up Receiver Front-endNm CmosComputer EngineeringData RateInstrumentationRf SubsystemSignal ProcessingCompact InductorElectromagnetic Compatibility
This paper presents a 2.45 GHz wake-up receiver front-end intended for use in sensor networks, and is designed to receive data modulated with on-off-keying. Manufactured in 65 nm CMOS it employs an uncertain IF structure with three-phase passive mixer and high gain amplifier chain. With the modulation frequency response tailored to the detector behavior, it achieves a sensitivity of -88 dBm at BER of 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-3</sup> with a data rate of 250kbps. Operating on a 0.75V supply it has a power consumption of just 50μW. It provides a 50 Ω input match completely on-chip using a compact inductor and has an active area of just 0.07mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> .
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