Publication | Closed Access
Multilevel MPSOC simulation using an MDE approach
17
Citations
6
References
2007
Year
Unknown Venue
Hardware ModelingEngineeringComputer ArchitectureDeployment ProfileSimulationCo-simulationProcessor ArchitectureHardware ArchitectureComputer DesignSystems EngineeringModeling And SimulationParallel ComputingMultilevel Implementation DetailsComputer EngineeringLarge-scale SimulationComputer ScienceMultilevel Mpsoc SimulationDifferent LevelsSoftware DesignHardware EmulationSimulation InfrastructureParallel ProgrammingMultiscale Modeling
In this paper, we first present an efficient Multi-Processor Systems-on-Chip design methodology based on Model-Driven Engineering. Later, a deployment profile is introduced to allow IP reuse and to carry multilevel implementation details. With this methodology, simulations at different levels are automatically generated, reducing the cost of targeting several levels. A compilation chain has been developed to transform the high abstraction level into both CABA and PVT simulation levels. The effectiveness of the methodology is illustrated by the development of an H.263 encoder.
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