A 6-bit low power flash ADC with a novel bubble error correction used in UWB communication systems

Abstract

In this paper, we propose a 6-bit flash ADC for Ultra-wideband communication (UWB) systems. This ADC has been fabricated in SMIC 0.18μm CMOS process. With an evolved differential preamplifier and comparator, the designed ADC achieved a high sampling rate of 1Gsps and 1.4GHz bandwidth. In addition, a novel bubble error correction (BEC) is proposed in this design and improves the accuracy effectively. The measurement results show the maximum INL and DNL of the proposed ADC are +0.48LSB/-0.36LSB and +0.67LSB/-0.25LSB, respectively, and the SFDR performance is over 39dB at 600Msps. Limited by the test environment, the ADC was test below 800MHz instead of 1GHz. Powered with a single 1.8V power supply, the power consumption of the ADC core is about 98mW and the FoM is only 0.76pJ/step*Hz. The proposed ADC has a small core area of less than 0.5mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> .