SOS current mirror matching at 4K: A brief study

Abstract

Current architectures for the control and readout of silicon qubits often involve the use of classical CMOS electronics used at temperatures below 4K. Fully depleted silicon on insulator CMOS is a primary candidate for such electronics as they are less affected by low temperature bulk induced hysteresis and kink effects and have lower parasitic capacitances than their bulk counterparts. While MOS transistors are known to work at low temperatures, a hitherto unexplored maxim of integrated circuit design is the use of matched components at low temperatures. In this study, we investigate the effect of low temperature operation on the matching in CMOS current mirrors: we compare measurements of the low frequency accuracy in a silicon on sapphire mirror at 300K and 4K. We find that while matching is reduced at low temperatures, circuit structures relying on matching components can still be employed at low temperatures albeit at reduced performance.