Room temperature memory operation of a single InAs quantum dot layer in a GaAs∕AlGaAs heterostructure

Abstract

Room temperature (RT) memory operation of a single InAs quantum dot (QD) layer serving as floating gate is demonstrated. In an in-plane gated quantum-wire transistor, the charge state of the self-assembled InAs QDs is controlled by the applied gate voltage. Due to the floating-gate function of the QDs on a nearby transport channel, threshold hysteresis exceeding 200mV and storage times of several minutes are observed. The RT operation is attributed to an optimized positioning of the QDs at the site of a local minimum in the AlGaAs conduction band.