Real-time hardware implementation of HEVC video encoder for 1080p HD video

Abstract

This paper describes a hardware implementation of HEVC (High Efficiency Video Coding) video encoder for exploring performance of HEVC in real-time applications. By optimizing hardware architecture and developing fast mode decision algorithms, our FPGA-based prototype can encode 1080p, 10-bit video at 60fps in real-time. Both objective and subjective evaluations clearly demonstrate that the developed HEVC encoder achieves significant coding gain relative to professional-use AVC/H.264 encoder available on the market. This paper also refers to the development of a real-time HEVC encoder for much higher resolution video such as SHV (Super Hi-Vision, 8K) using the HD encoder in parallel.