Pipeline, memory-efficient and programmable architecture for 2D discrete wavelet transform using lifting scheme

Abstract

The use of wavelet transforms is becoming increasingly important in different applications including image compression applications. In the paper the authors propose a dedicated architecture to implement a two-dimensional discrete wavelet transform using a lifting scheme method for image compression application. The advantages of the lifting scheme are lower computational complexity, transforming the signal without extension and resulting in reduced memory requirement. The proposed architecture is reconfigurable for 5/3 and 9/7 filters, and employs folded configuration to reduce the hardware cost and achieve higher hardware utilisation. The architecture is useful for VLSI implementation and various image/video applications. The design has been implemented in VHDL and is fully synthesizable.