FPGA implementation of a 32x32 autocorrelator array for analysis of fast image series

Abstract

With the evolving technology in CMOS integration, new classes of 2D-imaging\ndetectors have recently become available. In particular, single photon\navalanche diode (SPAD) arrays allow detection of single photons at high\nacquisition rates (\\geq 100 kfps), which is about two orders of magnitude\nhigher than with currently available cameras. Here we demonstrate the use of a\nSPAD array for imaging fluorescence correlation spectroscopy (imFCS), a tool to\ncreate 2D maps of the dynamics of fluorescent molecules inside living cells.\nTime-dependent fluorescence fluctuations, due to fluorophores entering and\nleaving the observed pixels, are evaluated by means of autocorrelation\nanalysis. The multi-{\\tau} correlation algorithm is an appropriate choice, as\nit does not rely on the full data set to be held in memory. Thus, this\nalgorithm can be efficiently implemented in custom logic. We describe a new\nimplementation for massively parallel multi-{\\tau} correlation hardware. Our\ncurrent implementation can calculate 1024 correlation functions at a resolution\nof 10{\\mu}s in real-time and therefore correlate real-time image streams from\nhigh speed single photon cameras with thousands of pixels.\n