IEEE Journal of Solid-State Circuits · 2004 · 39 citations · 5 references
EngineeringComputer EngineeringElectrical EngineeringMicroelectronicsSemiconductor DevicesSensorsAnalog Integrated CircuitsCmos Circuit DesignComplementary Metal-oxide-semiconductor TechnologyImage SensorsLow-noise Circuit DesignPhotodetectorsCmos Image SensorsConversion GainCorrelated Double SamplingFill FactorNoise FloorPixel ArchitecturePixel PitchRandom Noise
A 3.9-/spl mu/m pixel pitch VGA format 10-b digital output CMOS image sensor with 1.5 transistor/pixel has been developed for mobile applications. The newly developed CMOS pixel architecture realizes the minimum number of the transistors in one pixel. Small pixel size and sufficient fill factor are achieved by using the shared pixel architecture and floating diffusion driving. High conversion gain, low random noise, and low dark current are achieved by buried photodiode with complete charge transfer capability and correlated double sampling (CDS) circuit. The image sensor is fabricated in a thin planarized 0.35-/spl mu/m single poly-Si double-metal customized CMOS process in order to provide good image performance. The image sensor achieves low noise floor of 330 /spl mu/V and low dark current of 50 pA/cm/sup 2/ at 45/spl deg/C. This image sensor also realized various functions by on-chip digital and analog circuits.
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A 1 1/4 inch 8.3M pixel digital output CMOS APS for UDTV application
Isao Takayanagi, M. Shirakawa, K. Mitani et al. · 2003 · 32 citations
Engineering, Computer Engineering, Electrical Engineering +15