366-kS/s 1.09-nJ 0.0013-${\rm mm}^{2}$ Frequency-to-Digital Converter Based CMOS Temperature Sensor Utilizing Multiphase Clock

TLDR

The sensor uses a direct temperature‑to‑digital conversion in a frequency‑to‑digital converter, with a fine‑code generator algorithm that efficiently increases resolution. The 65‑nm CMOS sensor consumes 1.09 nJ at 366 kS/s, operates at lower VDD than prior work, and achieves ±2.7 °C chip‑to‑chip spread after one‑point calibration across –40 °C to 110 °C.

Abstract

A smart temperature sensor in 65-nm CMOS, utilizing CMOS ring oscillators, consumes 1.09 nJ at a conversion rate of 366 kS/s. This is achieved by the direct temperature-to-digital conversion method implemented in the frequency-to-digital converter. The algorithm utilized in the fine code generator makes it possible to increase the resolution of the sensor efficiently. Compared to previous work, this brief shows lower VDD operation. After one point calibration, the chip-to-chip spread is +2.7 ~ -2.9°C over the temperature range of -40°C to 110°C.