A 6.1 GS/s 52.8 mW 43 dB DR 80 MHz bandwidth 2.4 GHz RF bandpass ΔΣ ADC in 40 nm CMOS

Abstract

A 2.4 GHz 4th order BP ΔΣ ADC is presented. The feedforward topology uses Gm-LC resonators that can be calibrated in frequency. The quantizer is split in 6 interleaved comparators to relax speed. Clocked at 6.1 GHz, it achieves a DR of 43 dB in 80 MHz consuming 52.8 mW. Implemented in 40 nm CMOS, it achieves a FoM of 3.6 pJ/conv. step, which is to date the lowest published value for RF BP ADCs.