Optical interconnections for VLSI systems

TLDR

The shrinking of feature sizes and expanding chip sizes are creating a communication crisis in VLSI, as interconnection delays are expected to soon limit MOS circuit speeds. This paper investigates the possibility of applying optical and electro‑optical technologies to interconnection problems. The authors review the origins of the communication crisis, survey electro‑optical technologies for generation, routing, and detection of light on chips and boards, and discuss algorithmic implications—including a hierarchy of interconnection problems and potential applications to clock distribution and data interconnections. Areas in need of future research are identified.

Abstract

The combination of decreasing feature sizes and increasing chip sizes is leading to a communication crisis in the area of VLSI circuits and systems. It is anticipated that the speeds of MOS circuits will soon be limited by interconnection delays, rather than gate delays. This paper investigates the possibility of applying optical and electrooptical technologies to such interconnection problems. The origins of the communication crisis are discussed. Those aspects of electrooptic technology that are applicable to the generation, routing, and detection of light at the level of chips and boards are reviewed. Algorithmic implications of interconnections are discussed, with emphasis on the definition of a hierarchy of interconnection problems from the signal-processing area having an increasing level of complexity. One potential application of optical interconnections is to the problem of clock distribution, for which a single signal must be routed to many parts of a chip or board. More complex is the problem of supplying data interconnections via optical technology. Areas in need of future research are identified.